Sample behavioral waveforms for design file altpll0.vhd

The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design altpll0.vhd. The design altpll0.vhd has Cyclone II PLL_TYPE pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 18518 ps.

Fig. 1 : Wave showing NORMAL mode operation.